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Overview
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MCA-3K Data Structure: fpga_action
Summary
The fpga_action data structure contains the controls used to start and stop data acquisition as well as momentary commands, such as to clear data or initialize modules within the FPGA.
Data structure
For fpga_action there are 4 'register' and a larger number of 'fields' data in use. All register data are 16-bit unsigned int16 (uint16).
fpga_action registers and fields |
Register number and field name | Description |
AR0[0]: clear_histo | Write a zero to the histogram memory, or just to the active bank if CR13:segment_enable=1 |
AR0[1]: clear_statistics | Clear all event and time (statistics) counters, or just for the active bank if CR13:segment_enable=1 |
AR0[2]: clear_trace | Initialize the trace acquisition module. |
AR0[3]: clear_list_mode | Initialize the list mode module. |
AR0[4]: ut_run | Initialize the trace mode module and force an immediate untriggered trace acquisition. |
AR0[5:15]: ar0_upper | Unused; Set to zero. |
AR1[0:15]: ar1 | Unused; Set to zero |
AR2[0]: histo_run | Enable histogram data acquisition. |
AR2[1]: trace_run | Enable trace data acquisition. |
AR2[2]: lm_run | Enable list mode data acquisition. |
AR2[3]: segment | Set the active histogram memory segment (0 or 1). |
AR2[4]: segment_enable | Enable splitting the histogram memory into two equal-sized banks. There will be one statistics counter set for each bank. |
AR2[5:15]: ar2_upper | Unused; Set to zero. |
AR3[0:15]: ar3 | Unused; Set to zero |
The fpga_action registers; ARn means control register number n, with n=0...3 . Bitfields are indicated as [b_low:b_high] indicating bit numbers b_low to b_high, inclusive.
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